An Evaluation of Wafer Bumping Stencils Based on Solder Transfer Ratios and Predicted Bump Heights

  • To be Presented at IMAPS 2006, San Diego

    Scott Popelar and Bob Niemet
    IC Interconnect
    1025 Elkton Drive
    Colorado Springs, CO
    Phone: 719-533-1030
    Fax: 719-533-1021


    The accelerated development and implementation of flip chip and chip scale package (CSP) technologies has driven the seemingly conflicted goals of lower cost combined with increased process capability. While lower cost has been driven in large part by the discrete and power product sectors, increased process capability has in turn been driven by the widespread conversion to lead free alloys. Fortunately, from a wafer bumping standpoint, low cost and alloy flexibility are both readily achieved through the combination of electroless nickel/immersion gold under bump metallurgy (UBM) and stencil printed solder.

    Due to the success of extensive evaluations across many applications, electroless nickel/immersion gold has been accepted as a viable UBM alternative to more expensive sputtered and electroplated cap metal technologies. However, the design and evaluation techniques used to analyze and optimize stencil printing technology have lagged. As a result, wafer bumping stencil design has been left at the mercy of surface mount technology (SMT) guidelines that more often than not do not satisfy the more stringent requirements defined by flip chip and CSP technologies.

    In order to better characterize the performance of wafer bumping stencils, a novel solder transfer ratio has been defined that relates the amount of solder volume transferred to a wafer to the actual stencil aperture volume. This transfer ratio is a function of how fully an aperture fills with solder paste during the printing process, as well as how much paste is in turn released to the wafer. Knowing how the solder transfer ratio varies enables stencil designs that better achieve target bump heights with less bump height variation. Toward this end, an experimental technique has been developed that is used to measure solder transfer ratios.

    The technique is based on measuring the mass of transferred solder paste, and converting that mass to a transfer ratio based on the known aperture volume. Ratios have then been measured for different stencil designs (flip chip versus CSP) and solder alloys (tin-lead versus lead free), as well as different solder deposition techniques (squeegee blade versus enclosed print head). These transfer ratios, along with the corresponding stencil dimensions, are then fed into a solder bump height model.

    As the correlation of predicted to measured bump height is very strong, so too is the concept of the solder transfer ratio. Further, a correlation of measured solder paste mass to measured bump height is generated to show how target bump height and bump height variation can be controlled and monitored prior to reflowing a printed wafer.

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