A Low Cost Wafer Bumping Process For Flip Chip Applications
Scott F. Popelar and Curt A. Erickson
1025 Elkton Drive
Colorado Springs, CO
The application of flip chip technology provides many advantages over conventional integrated circuit packaging in terms of cost, electrical performance, I/O density, size and reliability. However, widespread use of flip chip as a surface mount alternative has been stunted due to the multi-million dollar investment in capital equipment required to bump wafers using traditional bumping techniques (i.e., vapor deposition, sputtering, photolithography, electroplating, etc.). To alleviate this problem, a low cost wafer bumping technique has been developed which is now available as a contract service, making flip chip an affordable and viable packaging option. The process combines an electroless nickel under bump metallurgy (UBM) with solder printing technology previously utilized in surface mount assembly. The UBM is formed through a series of wet chemistry baths which deposit a layer of nickel and gold on the existing aluminum I/O pads. Once the UBM has been established, solder paste is then deposited using a stencil printing technique. This paper describes the above wafer bumping process. In particular, key issues involving the formation of the electroless nickel UBM, solder printing of wafers, and stencil design are discussed.
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